1 --------------------------------------------------------------------------
2 --
3 -- Copyright (C) 1993, Peter J. Ashenden
4 -- Mail: Dept. Computer Science
5 -- University of Adelaide, SA 5005, Australia
6 -- e-mail: petera@cs.adelaide.edu.au
7 --
8 -- This program is free software; you can redistribute it and/or modify
9 -- it under the terms of the GNU General Public License as published by
10 -- the Free Software Foundation; either version 1, or (at your option)
11 -- any later version.
12 --
13 -- This program is distributed in the hope that it will be useful,
14 -- but WITHOUT ANY WARRANTY; without even the implied warranty of
15 -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 -- GNU General Public License for more details.
17 --
18 -- You should have received a copy of the GNU General Public License
19 -- along with this program; if not, write to the Free Software
20 -- Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
21 --
22 --------------------------------------------------------------------------
23 --
24 -- $RCSfile: reg_3_out-behaviour.vhdl,v $ $Revision: 1.1 $ $Date: 2000/05/08 14:36:48 $
25 --
26 --------------------------------------------------------------------------
27 --
28 -- Behavioural architecture of register with three tri-state outputs.
29 --
30
31
32 architecture behaviour of reg_3_out is
33
34 begin
35
36 reg: process (d, latch_en, out_en1, out_en2, out_en3)
37
38 variable latched_value : dlx_word;
39
40 begin
41 if latch_en = '1' then
42 latched_value := d;
43 end if;
44 if out_en1 = '1' then
45 q1 <= latched_value after Tpd;
46 else
47 q1 <= null after Tpd;
48 end if;
49 if out_en2 = '1' then
50 q2 <= latched_value after Tpd;
51 else
52 q2 <= null after Tpd;
53 end if;
54 if out_en3 = '1' then
55 q3 <= latched_value after Tpd;
56 else
57 q3 <= null after Tpd;
58 end if;
59 end process reg;
60
61 end behaviour;
62
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