dlx/alu-behaviour.vhdl

    1 --------------------------------------------------------------------------
    2 --
    3 --  Copyright (C) 1993, Peter J. Ashenden
    4 --  Mail:	Dept. Computer Science
    5 --		University of Adelaide, SA 5005, Australia
    6 --  e-mail:	petera@cs.adelaide.edu.au
    7 --
    8 --  This program is free software; you can redistribute it and/or modify
    9 --  it under the terms of the GNU General Public License as published by
   10 --  the Free Software Foundation; either version 1, or (at your option)
   11 --  any later version.
   12 --
   13 --  This program is distributed in the hope that it will be useful,
   14 --  but WITHOUT ANY WARRANTY; without even the implied warranty of
   15 --  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
   16 --  GNU General Public License for more details.
   17 --
   18 --  You should have received a copy of the GNU General Public License
   19 --  along with this program; if not, write to the Free Software
   20 --  Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
   21 --
   22 --------------------------------------------------------------------------
   23 --
   24 --  $RCSfile: alu-behaviour.vhdl,v $  $Revision: 1.1 $  $Date: 2000/05/08 14:36:47 $
   25 --
   26 --------------------------------------------------------------------------
   27 --
   28 --  Behavioural architecture of ALU.
   29 --
   30 
   31 
   32 architecture behaviour of alu is
   33 
   34 begin
   35 
   36   alu_op: process (s1, s2, latch_en, func)
   37 
   38     use work.bv_arithmetic.all;
   39 
   40     variable stored_s1, stored_s2 : dlx_word;
   41     variable temp_result : dlx_word;
   42     variable temp_overflow : boolean;
   43 
   44   begin
   45     if latch_en = '1' then
   46       stored_s1 := s1;
   47       stored_s2 := s2;
   48     end if;
   49     case func is
   50       when alu_pass_s1 =>
   51         temp_result := stored_s1;
   52       when alu_pass_s2 =>
   53         temp_result := stored_s2;
   54       when alu_and =>
   55         temp_result := stored_s1 and stored_s2;
   56       when alu_or =>
   57         temp_result := stored_s1 or stored_s2;
   58       when alu_xor =>
   59         temp_result := stored_s1 xor stored_s2;
   60       when alu_sll =>
   61         temp_result := bv_sll(stored_s1, bv_to_natural(stored_s2(27 to 31)));
   62       when alu_srl =>
   63         temp_result := bv_srl(stored_s1, bv_to_natural(stored_s2(27 to 31)));
   64       when alu_sra =>
   65         temp_result := bv_sra(stored_s1, bv_to_natural(stored_s2(27 to 31)));
   66       when alu_add =>
   67         bv_add(stored_s1, stored_s2, temp_result, temp_overflow);
   68       when alu_addu =>
   69         bv_addu(stored_s1, stored_s2, temp_result, temp_overflow);
   70       when alu_sub =>
   71         bv_sub(stored_s1, stored_s2, temp_result, temp_overflow);
   72       when alu_subu =>
   73         bv_subu(stored_s1, stored_s2, temp_result, temp_overflow);
   74     end case;
   75     result <= temp_result after Tpd;
   76     zero <= bit'val(boolean'pos(temp_result = dlx_word'(X"0000_0000"))) after Tpd;
   77     negative <= temp_result(0) after Tpd;
   78     overflow <= bit'val(boolean'pos(temp_overflow)) after Tpd;
   79   end process alu_op;
   80 
   81 end behaviour;
   82 

This page was generated using GHDL 0.14 (20040829) [Sokcho edition], a program written by Tristan Gingold